On the balance of VLIW architectures

This paper presents a methodology for designing balanced VLIW architectures. Since we are interested in the architectural aspects of those processors we have developed a framework to evaluate the relationship among the main components of a VLIW machine. Our framework includes the simulator of an actual processor, software tools both to detect the instruction level parallelism of application programs and to generate the parallel object code for each specific machine configuration derived from our basic model of VLIW architecture, and an interpreter which reproduces the behavior of each member of the VLIW family. By interpreting the optimized code derived from a suite of benchmark programs, we have determined the best VLIW configuration for each test program. From these experiments we have discovered which relationship among the machine components should be observed during the specification of a VLIW machine in order to obtain a balanced processor.