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Abnormal Capacitance Hysteresis Phenomena in Stacked Nanocrystalline-Si Based Metal Insulator Semiconductor Memory Structure
- Source :
- Key Engineering Materials. :547-550
- Publication Year :
- 2012
- Publisher :
- Trans Tech Publications, Ltd., 2012.
-
Abstract
- Stack nanocrystalline-Si (nc-Si) based metal insulator semiconductor memory structure was fabricated by plasma enhanced chemical vapor deposition. The doubly stacked layers of nc-Si with the thickness of about 5 nm were fabricated by the layer-by-layer deposition technique with silane and hydrogen mixture gas. Capacitance-Voltage (C-V) measurements were used to investigate electron tunnel and storage characteristic. Abnormal capacitance hysteresis phenomena are obtained. The C-V results show that the flatband voltage increases at first, then decreases and finally increases, exhibiting a clear deep at gate voltage of 9 V. The charge transfer effect model was put forward to explain the electron storage and discharging mechanism of the stacked nc-Si based memory structure. The decreasing of flatband voltage at moderate programming bias is attributed to the transfer of electrons from the lower nc-Si layer to the upper nc-Si layer.
- Subjects :
- Materials science
business.industry
Mechanical Engineering
Electrical engineering
Semiconductor memory
Capacitance
Nanocrystalline material
Hysteresis
Stack (abstract data type)
Mechanics of Materials
Plasma-enhanced chemical vapor deposition
Deposition (phase transition)
Optoelectronics
General Materials Science
business
Layer (electronics)
Subjects
Details
- ISSN :
- 16629795
- Database :
- OpenAIRE
- Journal :
- Key Engineering Materials
- Accession number :
- edsair.doi...........e8a14ef73873f07d1058912856c90cbe