New CMOS inverter-based voltage multipliers

Four new CMOS inverter-based voltage multipliers consisted of PMOS/NMOS pass transistors, inverter circuits, and capacitors are proposed in the paper. The proposed voltage multipliers which combine the functions of rectifiers and charge-pumps improve the power conversion efficiency and reduce the number of passive components therefore they are suitable for the integration. The voltage multiplier with positive output voltage is implemented with TSMC 0.35µm CMOS 2P4M processes, and the experimental results have showed good agreement with the theoretical analysis. The chip area without pads is only 1.75×1.32 mm2 for five-stage positive output voltage of voltage multiplier