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A fault-tolerant 256K RAM fabricated with molybdenum-polysilicon technology

Authors :
E. Arai
K. Hirata
N. Ieda
K. Takeya
T. Ogawa
T. Watanabe
K. Kiuchi
T. Mano
Source :
IEEE Journal of Solid-State Circuits. 15:865-872
Publication Year :
1980
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 1980.

Abstract

Describes a 256K molybdenum-polysilicon (Mo-poly) gate dynamic MOS RAM using a single transistor cell. Circuit technologies, including a capacitive-coupled sense-refresh amplifier and a redundant circuitry, enable the achievement of high performance in combination with Mo-poly technology. Electron-beam direct writing and dry etching technologies are fully utilized to make 1 /spl mu/m accurate patterns. The 256K word/spl times/1 bit device is fabricated on a 5.83 mm/spl times/5.90 mm chip. Cell size is 8.05 /spl mu/m/spl times/8.60 /spl mu/m. The additional 4K spare cells and the associated circuits, in which newly developed electrically programmable elements are used, occupy less than 10 percent of the whole chip area. The measured access time is 160 ns under V/SUB DD/=5 V condition.

Details

ISSN :
1558173X and 00189200
Volume :
15
Database :
OpenAIRE
Journal :
IEEE Journal of Solid-State Circuits
Accession number :
edsair.doi...........f89f44ac98d0cc6577b9ef06b6aa9317
Full Text :
https://doi.org/10.1109/jssc.1980.1051484