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Properties of Wired Logic

Authors :
Yahiko Kambayashi
Saburo Muroga
Source :
IEEE Transactions on Computers. :550-563
Publication Year :
1986
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 1986.

Abstract

When we design networks with NOR or NAND gates which are implemented with bipolar and MOS transistors, wired logic is usually allowed. The usage of wired logic reduces the network cost and possibly improves the speed because of shorter delays on wired logic than on a gate. Typical logic functions performed by wired logic are AND and OR, which are called wired-AND and wired-OR, respectively. Properties of networks with NOR gates and wired-AND (or wired-OR) are discussed. Some of these properties are used in developing synthesis procedures of optimum networks by the integer programming logic design method. For all three-variable functions, the optimum networks with NOR gates and wired-OR's, designed by this synthesis approach, are shown.

Details

ISSN :
00189340
Database :
OpenAIRE
Journal :
IEEE Transactions on Computers
Accession number :
edsair.doi...........fb21842c4ae4e3a11e32044e9fcdbef0
Full Text :
https://doi.org/10.1109/tc.1986.5009432