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Through-Silicon Via Fabrication, Backgrind, and Handle Wafer Technologies

Authors :
Greg Smith
Larry Smith
Sitaram Arkalgud
Susan Vitkavage
Sharath Hosali
Source :
Integrated Circuits and Systems ISBN: 9780387765327
Publication Year :
2008
Publisher :
Springer US, 2008.

Abstract

The important method of bonding wafers to wafers or die to wafers has been discussed in an earlier chapter. In this chapter, we will examine the formation and filling of through-silicon vias (TSVs) and the post-bond process of thinning waferto-wafer pairs to further process TSVs and build metallization on the final exposed surface. In the section on wafer thinning, the hydrogen-induced splitting of thin silicon layers developed for silicon-on-insulator (SOI) will also be described. In a sense, this is a deviation from the basic processes to stack wafers or dies, but it describes a method to create a type of 3D, which was first envisioned in the 1980s, namely “stacked complementary metal-oxide semiconductor (CMOS)”. Finally, we will comment on processing with handle wafers and mention some of the current methods and areas of research to make this a more cost-effective way of transferring device layers.

Details

ISBN :
978-0-387-76532-7
ISBNs :
9780387765327
Database :
OpenAIRE
Journal :
Integrated Circuits and Systems ISBN: 9780387765327
Accession number :
edsair.doi...........fdfb0ad5ccc91d2aa8e3d54e355fc09f
Full Text :
https://doi.org/10.1007/978-0-387-76534-1_5