Optimised CORDIC‐based atan2 computation for FPGA implementations

[EN] A method for the implementation of the atan2 operator based on the coordinate rotation digital computer algorithm is described. In the proposal, the computation of the z-path takes advantage of the look-up table-based FPGA resources to reduce by between 17 and 25%, without performance deterioration, the overall area of the unrolled architecture.
This work was funded by the Spanish Ministerio de Economia y Competitividad and FEDER under the grant TEC2015-70858-C2-2-R.