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High-performance repetition cat code using fast noisy operations

Authors :
Régent, Francois-Marie Le
Berdou, Camille
Leghtas, Zaki
Guillaud, Jérémie
Mirrahimi, Mazyar
Alice & Bob
QUANTum Information Circuits (QUANTIC)
Mines Paris - PSL (École nationale supérieure des mines de Paris)
Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Sorbonne Université (SU)-Inria de Paris
Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-Laboratoire de physique de l'ENS - ENS Paris (LPENS)
Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Université Paris Cité (UPCité)-Département de Physique de l'ENS-PSL
École normale supérieure - Paris (ENS-PSL)
Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-École normale supérieure - Paris (ENS-PSL)
Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Centre National de la Recherche Scientifique (CNRS)-Université Paris Cité (UPCité)-Département de Physique de l'ENS-PSL
Université Paris sciences et lettres (PSL)
Centre Automatique et Systèmes (CAS)
Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)
Mirrahimi, Mazyar
Publication Year :
2023
Publisher :
HAL CCSD, 2023.

Abstract

Bosonic cat qubits stabilized by two-photon driven dissipation benefit from exponential suppression of bit-flip errors and an extensive set of gates preserving this protection. These properties make them promising building blocks of a hardware-efficient and fault-tolerant quantum processor. In this paper, we propose a performance optimization of the repetition cat code architecture using fast but noisy CNOT gates for stabilizer measurements. This optimization leads to high thresholds for the physical figure of merit, given as the ratio between intrinsic single-photon loss rate of the bosonic mode and the engineered two-photon loss rate, as well as a very interesting scaling below threshold of the required overhead, to reach an expected level of logical error rate. Relying on the specific error models for cat qubit operations, this optimization exploits fast parity measurements, using accelerated low-fidelity CNOT gates, combined with fast ancilla parity-check qubits. The significant enhancement in the performance is explained by: 1- the highly asymmetric error model of cat qubit CNOT gates with a major component on control (ancilla) qubits, and 2- the robustness of the error correction performance in presence of the leakage induced by fast operations. In order to demonstrate these performances, we develop a method to sample the repetition code under circuit-level noise that also takes into account cat qubit state leakage.<br />Comment: 15 pages, 9 figures

Details

Language :
English
Database :
OpenAIRE
Accession number :
edsair.doi.dedup.....11fd80b5a5c69fd812a622a5c5843f4d