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Gate lag in InP HFET : influence on digital circuits

Authors :
Gautier-Levine, A.
Scavennec, A.
Lefevre, R.
Falcou, A.
Dumas, J.M
Source :
Gautier-Levine, A. ; Scavennec, A. ; Lefevre, R. ; Falcou, A. ; Dumas, J.M (1998) Gate lag in InP HFET : influence on digital circuits. In: Gallium Arsenide Applications Symposium. GAAS 1998, 5-6 October 1998, Amsterdam, The Netherlands.
Publication Year :
1998

Abstract

The GaAs MESFET is widely used in high speed digital transmission. But the frequency dispersion of both transconductance and output conductance, mainly due to traps, often penalizes the use of these devices in circuit applications (1). In the time domain these parasitic effects lead to a distorsion of the transmitted pulse and to the shift of the logic levels. GaAs P-HEMTs are known to exhibit less distorsion and gate lag effects. InP HFETs are also susceptible to drain/gate lag effects (2). We report on comparative measurements on GaAs MESFET, GaAs P-HEMT and InP HFET in order to gain a better understanding of the role of traps in InP HFETs.

Subjects

Subjects :
ING-INF/01 Elettronica

Details

Language :
Italian
Database :
OpenAIRE
Journal :
Gautier-Levine, A. ; Scavennec, A. ; Lefevre, R. ; Falcou, A. ; Dumas, J.M (1998) Gate lag in InP HFET : influence on digital circuits. In: Gallium Arsenide Applications Symposium. GAAS 1998, 5-6 October 1998, Amsterdam, The Netherlands.
Accession number :
edsair.doi.dedup.....38adc7c4e1fa4cda114ade83a9d1d038