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Deep p-Ring Trench Termination: An Innovative and Cost-Effective Way to Reduce Silicon Area

Authors :
Neophytos Lophitis
Chiara Corvasce
U. Badstuebner
Florin Udrea
Munaf Rahimo
Umamaheswara Vemulapati
Marina Antoniou
Antoniou, M [0000-0002-7544-3784]
Lophitis, N [0000-0002-0901-0876]
Udrea, F [0000-0002-7288-3370]
Rahimo, M [0000-0002-4632-5463]
Apollo - University of Cambridge Repository
Source :
IEEE Electron Device Letters. 40:177-180
Publication Year :
2019
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2019.

Abstract

A new type of high-voltage termination, namely the “deep p-ring trench” termination design for high-voltage, high-power devices, is presented and extensively simulated. Termination of such devices consumes a large proportion of the chip size; the proposed design concept not only reduces the termination silicon area required but also removes the need for an additional mask as is the case of the traditional p+ ring-type termination. Furthermore, the presence of the p-ring under and around the bottom of the trench structure reduces the electric field peaks at the corners of the oxide, which results in reduced hot carrier injection and improved device reliability.

Details

ISSN :
15580563 and 07413106
Volume :
40
Database :
OpenAIRE
Journal :
IEEE Electron Device Letters
Accession number :
edsair.doi.dedup.....3a5e6485e1829c4ca31005862987a0aa