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3DVLSI with CoolCube process: An alternative path to scaling
- Source :
- 2015 VLSI-Technology Technical Digest, 2015 IEEE Symposium on VLSI Technology, 2015 IEEE Symposium on VLSI Technology, Jun 2015, Kyoto, Japan. pp.T48-T49, ⟨10.1109/VLSIT.2015.7223698⟩
- Publication Year :
- 2015
- Publisher :
- HAL CCSD, 2015.
-
Abstract
- session 5: 3D Systems and Packaging; International audience; 3D VLSI with a CoolCube™ integration allows vertically stacking several layers of devices with a unique connecting via density above a million/mm 2 . This results in increased density with no extra cost associated to transistor scaling, while benefiting from gains in power and performance thanks to wire-length reduction. CoolCube™ technology leads to high performance top transistors with Thermal Budgets (TB) compatible with bottom MOSFET integrity. Key enablers are the dopant activation by Solid Phase Epitaxy (SPE) or nanosecond laser anneal, low temperature epitaxy, low k spacers and direct bonding. New data on the maximal TB bottom MOSFET can withstand (with high temperatures but short durations) offer new opportunities for top MOSFET process optimization.
- Subjects :
- 010302 applied physics
Very-large-scale integration
Materials science
business.industry
Transistor
Stacking
Electrical engineering
02 engineering and technology
Direct bonding
Dopant Activation
01 natural sciences
7. Clean energy
020202 computer hardware & architecture
law.invention
law
0103 physical sciences
MOSFET
0202 electrical engineering, electronic engineering, information engineering
Optoelectronics
Process optimization
[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
business
Scaling
Subjects
Details
- Language :
- English
- Database :
- OpenAIRE
- Journal :
- 2015 VLSI-Technology Technical Digest, 2015 IEEE Symposium on VLSI Technology, 2015 IEEE Symposium on VLSI Technology, Jun 2015, Kyoto, Japan. pp.T48-T49, ⟨10.1109/VLSIT.2015.7223698⟩
- Accession number :
- edsair.doi.dedup.....3c2ded39939fef69ac4246deba1297f1