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SiC Vertical JFET Pure Diode-Less Inverter Leg

Authors :
Sebastien Oge
Fabien Dubois
Florent Morel
Xavier Fonteneau
Dominique Bergogne
Hervé Morel
Remy Ouaida
Ampère (AMPERE)
École Centrale de Lyon (ECL)
Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL)
Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon)
Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)
Thales Microelectronics
entreprise
Source :
Proceedings of the 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition, APEC, APEC, Mar 2013, Long Beach, CA, United States. pp.512-517, ⟨10.1109/APEC.2013.6520258⟩
Publication Year :
2013
Publisher :
HAL CCSD, 2013.

Abstract

International audience; The aim of this paper is to investigate the ability of a vertical structure JFET to operate in an inverter leg without any internal or external diode. The JFET is characterized to show the reverse conduction capability while the gate-to-source voltage is lower than the threshold voltage. An inverter leg is tested at 540 V /5 A and 50 kHz. A specific test board is implemented to assess a safe operation over a period of time.

Details

Language :
English
Database :
OpenAIRE
Journal :
Proceedings of the 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition, APEC, APEC, Mar 2013, Long Beach, CA, United States. pp.512-517, ⟨10.1109/APEC.2013.6520258⟩
Accession number :
edsair.doi.dedup.....54e3cbf4ef65c26e399f3868b234f94a
Full Text :
https://doi.org/10.1109/APEC.2013.6520258⟩