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An SRAM weak cell fault model and a DFT technique with a programmable detection threshold
- Source :
- Test Conference, 2004. Proceedings. ITC 2004. International, October 26-28, Ontario Canada, 1006-1015, STARTPAGE=1006;ENDPAGE=1015;TITLE=Test Conference, 2004. Proceedings. ITC 2004. International, October 26-28, Ontario Canada, ITC
- Publication Year :
- 2004
- Publisher :
- Institute of Electrical and Electronics Engineers, 2004.
-
Abstract
- SRAM cell stability has become an important design and test issue owing to significant process spreads, non-ideal operational conditions, and subtle manufacturing defects in scaled-down geometries. In this article, we carry out an extensive SRAM SNM sensitivity analysis and propose an SRAM cell stability fault model for weak cell detection. This fault model is used to design and verify a proposed digitally programmable design-for-test (DFT) technique targeting the weak cell detection in embedded SRAMs (eSRAM).
- Subjects :
- Engineering
Hardware_MEMORYSTRUCTURES
business.industry
Detection threshold
Design for testing
Process (computing)
Integrated circuit design
Hardware_PERFORMANCEANDRELIABILITY
Stability (probability)
Embedded system
Electronic engineering
Sensitivity (control systems)
Static random-access memory
Fault model
business
Subjects
Details
- Language :
- English
- Database :
- OpenAIRE
- Journal :
- Test Conference, 2004. Proceedings. ITC 2004. International, October 26-28, Ontario Canada, 1006-1015, STARTPAGE=1006;ENDPAGE=1015;TITLE=Test Conference, 2004. Proceedings. ITC 2004. International, October 26-28, Ontario Canada, ITC
- Accession number :
- edsair.doi.dedup.....5ca74dbd6a684d00984d94d19e3a1470
- Full Text :
- https://doi.org/10.1109/TEST.2004.1387366