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Computing 256-bit Elliptic Curve Logarithm in 9 Hours with 126133 Cat Qubits

Authors :
Gouzien, Élie
Ruiz, Diego
Régent, Francois-Marie Le
Guillaud, Jérémie
Sangouard, Nicolas
Institut de Physique Théorique - UMR CNRS 3681 (IPHT)
Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Paris-Saclay-Centre National de la Recherche Scientifique (CNRS)
Laboratoire de physique de l'ENS - ENS Paris (LPENS)
Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS)-Université Paris Cité (UPCité)-Département de Physique de l'ENS-PSL
École normale supérieure - Paris (ENS-PSL)
Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-École normale supérieure - Paris (ENS-PSL)
Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)
Publication Year :
2023
Publisher :
HAL CCSD, 2023.

Abstract

Cat qubits provide appealing building blocks for quantum computing. They exhibit a tunable noise bias yielding an exponential suppression of bit-flips with the average photon number and a protection against the remaining phase errors can be ensured by a simple repetition code. We here quantify the cost of a repetition code and provide a valuable guidance for the choice of a large scale architecture using cat qubits by realizing a performance analysis based on the computation of discrete logarithms on an elliptic curve with Shor's algorithm. By focusing on a 2D grid of cat qubits with neighboring connectivity, we propose to implement two-qubit gates via lattice surgery and Toffoli gates with off-line fault-tolerant preparation of magic states through projective measurements and subsequent gate teleportations. All-to-all connectivity between logical qubits is ensured by routing qubits. Assuming a ratio between single-photon and two-photon losses of $10^{-5}$ and a cycle time of 500 nanoseconds, we show concretely that such an architecture can compute $256$-bit elliptic curve logarithm in $9$ hours with 126133 cat qubits. We give the details of the realization of Shor's algorithm so that the proposed performance analysis can be easily reused to guide the choice of architecture for others platforms.<br />4+34 pages, 32 figures, 5 tables

Details

Language :
English
Database :
OpenAIRE
Accession number :
edsair.doi.dedup.....80d97a04683c9f9a18308feccd87f754