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STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators
- Source :
- IEEE Computer Architecture Letters. 20:122-125
- Publication Year :
- 2021
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 2021.
-
Abstract
- The design of specialized architectures for accelerating the inference procedure of Deep Neural Networks (DNNs) is a booming area of research nowadays. While first-generation rigid accelerator proposals used simple fixed dataflows tailored for dense DNNs, more recent architectures have argued for flexibility to efficiently support a wide variety of layer types, dimensions, and sparsity. As the complexity of these accelerators grows, the analytical models currently being used prove unable to capture execution-time subtleties, thus resulting inexact in many cases. We present STONNE ( S imulation TO ol of N eural N etwork E ngines ), a cycle-level microarchitectural simulator for state-of-the-art rigid and flexible DNN inference accelerators that can plug into any high-level DNN framework as an accelerator device, and perform full-model evaluation of both dense and sparse real, unmodified DNN models.
Details
- ISSN :
- 24732575 and 15566056
- Volume :
- 20
- Database :
- OpenAIRE
- Journal :
- IEEE Computer Architecture Letters
- Accession number :
- edsair.doi.dedup.....8c764306a39ea2ecbdc1215a59c58982
- Full Text :
- https://doi.org/10.1109/lca.2021.3097253