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Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel Attacks

Authors :
Dake Chen
Christine Goins
Maxwell Waugaman
Georgios D. Dimou
Peter A. Beerel
Source :
Proceedings of the Great Lakes Symposium on VLSI 2023.
Publication Year :
2023
Publisher :
ACM, 2023.

Abstract

In this paper, we describe and analyze an island-based random dynamic voltage scaling (iRDVS) approach to thwart power side-channel attacks. We first analyze the impact of the number of independent voltage islands on the resulting signal-to-noise ratio and trace misalignment. As part of our analysis of misalignment, we propose a novel unsupervised machine learning (ML) based attack that is effective on systems with three or fewer independent voltages. Our results show that iRDVS with four voltage islands, however, cannot be broken with 200k encryption traces, suggesting that iRDVS can be effective. We finish the talk by describing an iRDVS test chip in a 12nm FinFet process that incorporates three variants of an AES-256 accelerator, all originating from the same RTL. This included a synchronous core, an asynchronous core with no protection, and a core employing the iRDVS technique using asynchronous logic. Lab measurements from the chips indicated that both unprotected variants failed the test vector leakage assessment (TVLA) security metric test, while the iRDVS was proven secure in a variety of configurations.

Details

Database :
OpenAIRE
Journal :
Proceedings of the Great Lakes Symposium on VLSI 2023
Accession number :
edsair.doi.dedup.....991acdb9ad749346483b2066b4a755e3
Full Text :
https://doi.org/10.1145/3583781.3590266