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Software and hardware in the loop component for an IEC 61850 Co-Simulation platform

Authors :
Jean-Marc Thiriet
Mohamad Haffar
Mohamad El-Nachar
Thiriet, Jean-Marc
IMCSIT
GIPSA - Signal et Automatique pour la surveillance, le diagnostic et la biomécanique (GIPSA-SAIGA)
Département Automatique (GIPSA-DA)
Grenoble Images Parole Signal Automatique (GIPSA-lab)
Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Grenoble Images Parole Signal Automatique (GIPSA-lab)
Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Département Images et Signal (GIPSA-DIS)
Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)
Euro-System
Université Libanaise
Contrat CIFRE
Source :
Proceedings of the International Multiconference on Computer Science and Information Technology, IMCSIT 2010-International Multiconference on Computer Science and Information Technology, IMCSIT 2010-International Multiconference on Computer Science and Information Technology, Oct 2010, Wisla, Poland. pp.817-823, IMCSIT, HAL
Publication Year :
2010
Publisher :
HAL CCSD, 2010.

Abstract

International audience; The deployment of IEC61850 standard in the world of substation automation system brings to the use of specific strategies for architecture testing. To validate IEC61850 architecture, the first step consists in validating the conformity of the object modeling and services implementation inside devices. The second step consists in validating IEC61850 applications compliance according to the project specifications. A part of the architecture can of course be tested "physically"; however in the design phase or when the actual architecture cannot be checked directly, modeling is helpful. In our research study we propose a co-simulation approach based on several components allowing the realization of advanced tests. This paper describes the need and the design implementation of software and hardware in the loop components as well as the object modeling concept of IED models.

Details

Language :
English
Database :
OpenAIRE
Journal :
Proceedings of the International Multiconference on Computer Science and Information Technology, IMCSIT 2010-International Multiconference on Computer Science and Information Technology, IMCSIT 2010-International Multiconference on Computer Science and Information Technology, Oct 2010, Wisla, Poland. pp.817-823, IMCSIT, HAL
Accession number :
edsair.doi.dedup.....b6c437b696e6ccfab5afac02a54f7945