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CMOS Circuit Design for Classification of ST and VT Arrhythmia Based on Morphological Analysis using Neural Network Classifier
- Publication Year :
- 2020
- Publisher :
- Zenodo, 2020.
-
Abstract
- Ventricular tachycardia is a life threatening medical emergency. Discerning dangerous ventricular rhythms with safe Sinus tachycardia based on heart rate is very tough as they are having similar heart rate. Most of the existing research used time information for classification which may lead false alarm. Hence a CMOS circuit is proposed to classify ventricular-tachycardia based on morphological changes in QRS complex. The design includes sample and hold circuit for sampling QRS complex, mapping circuit for map the given input signal to unit length, hamming neural network and winner take all circuits for classification of ventricular tachycardia. This design is implemented using 180nm CMOS technology with the operating voltage and power consumption of 19.81µW.
- Subjects :
- Environmental Engineering
Computer science
Sinus tachycardia
business.industry
B4114129219/2020©BEIESP
General Engineering
Pattern recognition
2249-8958
Ventricular tachycardia
medicine.disease
Neural network classifier
Computer Science Applications
Morphological analysis
medicine
cardiovascular system
Cmos circuit design
Artificial intelligence
cardiovascular diseases
medicine.symptom
business
Sinus tachycardia, Ventricular tachycardia, arrhythmia classifier, Hamming Neural Network, WTA Networks
Subjects
Details
- Language :
- English
- Database :
- OpenAIRE
- Accession number :
- edsair.doi.dedup.....f67df2fa2264dc96a988186ca3336425