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Threshold voltage shift in 0.1 μm self-aligned-gate GaAs MESFETs under bias stress and related degradation of ultra-high-speed digital ICs
- Source :
- Microelectronics Reliability. 39:1787-1792
- Publication Year :
- 1999
- Publisher :
- Elsevier BV, 1999.
-
Abstract
- Bias-temperature stress examinations of self-aligned 0.1 μm length gate GaAs MESFETs have revealed a shift of threshold voltage related to Si doping concentration near the gate sides next to the channel region. With lower doping concentration, the increase in threshold voltage in FETs was faster and a 100 mV increase leads to a 20% reduction of operation speed in digital ICs after forward-biased storage at 200°C. The recovery of the performance under reverse-biased stresses was observed. The degradation is released by increasing Si doping concentration and thus we obtained the prediction of a median life exceeding 10 6 h at 100°C by setting the Si dose of 4 × 10 13 cm −2 , which is as high as it can be set without causing serious reduction of breakdown voltage.
- Subjects :
- Ultra high speed
Materials science
Reverse short-channel effect
Gallium arsenide
Stress (mechanics)
chemistry.chemical_compound
Charge-carrier density
Breakdown voltage
Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality
Dopant
business.industry
Doping
Electrical engineering
Self-aligned gate
Overdrive voltage
Condensed Matter Physics
Atomic and Molecular Physics, and Optics
Surfaces, Coatings and Films
Electronic, Optical and Magnetic Materials
Threshold voltage
chemistry
Optoelectronics
Degradation (geology)
business
Degradation (telecommunications)
Subjects
Details
- ISSN :
- 00262714
- Volume :
- 39
- Database :
- OpenAIRE
- Journal :
- Microelectronics Reliability
- Accession number :
- edsair.doi.dedup.....f98a11c0fa89d102b76457d4c2d0ad39