A 60-V, > 225°C half-bridge driver for piezoelectric acoustic transducer, on SOI CMOS

This brief presents a high-voltage (HV) transducer driver to fulfill the requirement of the proposed high-data-rate down-hole acoustic telemetry system. The driver is targeted to drive a stack of piezoelectric disks modeled as a capacitive load of 0.3 μF and across a broadband from 600 Hz to 1.2 kHz. To ensure stability, the driver is designed as an open-loop system, comprising a dead-time controller, level shifters, gate drivers, and power MOSFETs. The driver is fabricated using the 1.0- μm silicon-on-insulator CMOS process and its performance is investigated up to 260 °C, far beyond the specified process limit of 225 °C. The experimental results also validated the functionality of the HV Class-D-type driver for voltages up to 60 V.