Asynchronous time-to-digital converter

U sklopu diplomskog rada projektiran je jedan vremensko-digitalni pretvornik te je implementiran na FPGA pločici i prikazani su rezultati mjerenja. Sklop je prošao kroz više promjena dok nisu dobiveni zadovoljavajući rezultati. TDC je projektiran u Quartus II kao shema i prebačena je u VHDL kod. TakoĎer je izvedena MATLAB simulacija jednostavnog vremensko digitalnog pretvornika i prikazani su rezultati simulacije Time-to-digital converters are electronic devices which measure very short time intervals and can digitalise those intervals. They are often use din PLL circuits and particle physics and therefore are interesting. One kind of time-to-digital converter is implemented in FPGA circuit board and measurement results are shown in this thesis. The circuit went through some changes until satisfying results are obtained. TDC is designed in Quartus II as a schematic and then it is transfered to VHDL code. A simulation in MATLAB was made and the results are displayed in this paper.