A 174.7-dB FoM, 2

This paper presents a second-order voltage-controlled oscillator (VCO)-based front-end for the direct digitization of biopotential signals. This work addresses the non-linearity of VCO-based ADC architectures with a mismatch resilient, multi-phase quantizer, a gated-inverted-ring oscillator (GIRO), achieving110-dB SFDR. Leveraging the time-domain encoding of the first integrator, the ADC's power is dynamically scaled with the input amplitude enabling up to 35% power savings in the absence of motion artifacts or interference. An auxiliary input-impedance booster increases the ADC's input impedance to 50 MΩ across the entire bandwidth. Fabricated in a 65-nm CMOS process, this ADC achieves 92.3-dB SNDR in a 1 kHz BW while consuming 5.8 µW for a 174.7 dB Schreier FoM.