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Top-gated graphene field-effect-transistors formed by decomposition of SiC

Authors :
Wu, Y. Q.
Ye, P. D.
Capano, M. A.
Xuan, Y.
Sui, Y.
Qi, M.
Cooper, J. A.
Source :
Applied Physics Letters 92, 092192 (2008)
Publication Year :
2008

Abstract

Top-gated, few-layer graphene field-effect transistors (FETs) fabricated on thermally-decomposed semi-insulating 4H-SiC substrates are demonstrated. Physical vapor deposited SiO2 is used as the gate dielectric. A two-dimensional hexagonal arrangement of carbon atoms with the correct lattice vectors, observed by high-resolution scanning tunneling microscopy, confirms the formation of multiple graphene layers on top of the SiC substrates. The observation of n-type and p-type transition further verifies Dirac Fermions unique transport properties in graphene layers. The measured electron and hole mobility on these fabricated graphene FETs are as high as 5400 cm2/Vs and 4400 cm2/Vs respectively, which are much larger than the corresponding values from conventional SiC or silicon.

Details

Database :
arXiv
Journal :
Applied Physics Letters 92, 092192 (2008)
Publication Type :
Report
Accession number :
edsarx.0802.4103
Document Type :
Working Paper
Full Text :
https://doi.org/10.1063/1.2889959