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Accelerating Sparse DNN Models without Hardware-Support via Tile-Wise Sparsity

Authors :
Guo, Cong
Hsueh, Bo Yang
Leng, Jingwen
Qiu, Yuxian
Guan, Yue
Wang, Zehuan
Jia, Xiaoying
Li, Xipeng
Guo, Minyi
Zhu, Yuhao
Publication Year :
2020

Abstract

Network pruning can reduce the high computation cost of deep neural network (DNN) models. However, to maintain their accuracies, sparse models often carry randomly-distributed weights, leading to irregular computations. Consequently, sparse models cannot achieve meaningful speedup on commodity hardware (e.g., GPU) built for dense matrix computations. As such, prior works usually modify or design completely new sparsity-optimized architectures for exploiting sparsity. We propose an algorithm-software co-designed pruning method that achieves latency speedups on existing dense architectures. Our work builds upon the insight that the matrix multiplication generally breaks the large matrix into multiple smaller tiles for parallel execution. We propose a tiling-friendly "tile-wise" sparsity pattern, which maintains a regular pattern at the tile level for efficient execution but allows for irregular, arbitrary pruning at the global scale to maintain the high accuracy. We implement and evaluate the sparsity pattern on GPU tensor core, achieving a 1.95x speedup over the dense model.<br />Comment: 12pages, ACM/IEEE Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC20)

Details

Database :
arXiv
Publication Type :
Report
Accession number :
edsarx.2008.13006
Document Type :
Working Paper