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A Custom IC Layout Generation Engine Based on Dynamic Templates and Grids

Authors :
Shin, Taeho
Lee, Dongjun
Kim, Dongwhee
Sung, Gaeryun
Shin, Wookjin
Jo, Yunseong
Park, Hyungjoo
Han, Jaeduk
Publication Year :
2022

Abstract

This paper presents an automatic layout generation framework in advanced CMOS technologies. The framework extends the template-and-grid-based layout generation methodology with the following additional techniques applied to produce optimal layouts more effectively. First, layout templates and grids are dynamically created and adjusted during runtime to serve various structural, functional, and design requirements. Virtual instances support the dynamic template-and-grid-based layout generation process. The framework also implements various post-processing functions to handle process-specific requirements efficiently. The post-processing functions include cut/dummy pattern generation and multiple-patterning adjustment. The generator description capability is enhanced with circular grid indexing/slicing and conditional conversion operators. The layout generation framework is applied to various design examples and generates DRC/LVS clean layouts automatically in multiple CMOS technologies.<br />Comment: 10 pages, 6 figures

Details

Database :
arXiv
Publication Type :
Report
Accession number :
edsarx.2207.11728
Document Type :
Working Paper
Full Text :
https://doi.org/10.1109/TCAD.2023.3294462