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Monolithic Integration of Si-CMOS and III-V-on-Si Through Direct Wafer Bonding Process

Authors :
Kwang Hong Lee
Yue Wang
Bing Wang
Li Zhang
Wardhana Aji Sasangka
Shuh Chin Goh
Shuyu Bao
Kenneth E. Lee
Eugene A. Fitzgerald
Chuan Seng Tan
Source :
IEEE Journal of the Electron Devices Society, Vol 6, Pp 571-578 (2018)
Publication Year :
2018
Publisher :
IEEE, 2018.

Abstract

Integration of silicon-complementary metal oxide-semiconductor (Si-CMOS) and III-V compound semiconductors (with device structures of either InGaAs HEMT, AlGaInP LED, GaN HEMT, or InGaN LED) on a common Si substrate is demonstrated. The Si-CMOS layer is temporarily bonded on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. For GaN HEMT or LED on Si substrate, additional wafer bonding step is required to replace the fragile Si (111) substrate after high temperature GaN growth with a new Si (001) wafer to improve the robustness of the GaN/Si wafers. Through this substrate replacement step, the bonded wafer pair can survive the subsequent processing steps. The monolithic integration of Si-CMOS + III-V devices on a common Si platform enables new generation of systems with more functionality, better energy efficiency, and smaller form factor.

Details

Language :
English
ISSN :
21686734
Volume :
6
Database :
Directory of Open Access Journals
Journal :
IEEE Journal of the Electron Devices Society
Publication Type :
Academic Journal
Accession number :
edsdoj.106cec30e0844dcf8fff546ef525576e
Document Type :
article
Full Text :
https://doi.org/10.1109/JEDS.2017.2787202