Back to Search Start Over

Design and prototype verification of multi-channel high-speed storage circuit base on PCIE to SATA

Authors :
Wang Qi
Zhang Meijuan
Deng Jiawei
Yang Chuwei
Zhou Qian
Source :
Dianzi Jishu Yingyong, Vol 49, Iss 3, Pp 72-76 (2023)
Publication Year :
2023
Publisher :
National Computer System Engineering Research Institute of China, 2023.

Abstract

Aiming at the problem that the traditional SATA controller has a single interface and cannot give full play to the performance of the SSD, a multi-channel high-speed storage circuit based on PCIE to SATA is designed. This design makes full use of the high-bandwidth and low-latency characteristics of the PCIE bus and follows the AHCI protocol, which can greatly reduce the useless seek times and data search time of the hard disk, and improve the read performance. At the same time, the design can support 4 SATA channels and has good scalability. This design combines the characteristics of PCIE and SATA protocols, introduces the system architecture of PCIE to SATA high-speed storage circuit, and elaborates the data stream transmission process based on AHCI protocol. Finally, the circuit is tested based on the FPGA prototype verification. The single-disk read and write rates of the circuit are 562MB/s and 527MB/s, respectively. Compared with the traditional SATA controller, the read and write performance is greatly improved. The test results show that the designed PCIE to SATA high-speed storage circuit has excellent read and write performance, and has good stability and scalability.

Details

Language :
Chinese
ISSN :
02587998
Volume :
49
Issue :
3
Database :
Directory of Open Access Journals
Journal :
Dianzi Jishu Yingyong
Publication Type :
Academic Journal
Accession number :
edsdoj.1e82dd2e03d6464b94a3a29b61b6dabd
Document Type :
article
Full Text :
https://doi.org/10.16157/j.issn.0258-7998.223077