Frequency coupling suppression and SISO modelling for VSCs with DC‐link dynamics in weak grids

Abstract This study proposes a frequency coupling suppression strategy for voltage source converters (VSCs) with DC‐link dynamics to address the challenges posed by the asymmetric system structures for system modelling and control design. The strategy introduces a reshaping outer loop into the q‐axis, which eliminates the conjugate voltages and currents induced by the DC‐link dynamics, to achieve decoupling of the DC‐link voltage control (DVC). Therefore, the VSC is modelled as a single‐input single‐output (SISO) admittance model, which provides clear physical insights for the analysis of admittance characteristics. Compared with the admittance matrix, the SISO model reveals the dominance of each control dynamics on VSC admittance in different frequency bands. This insight facilitates the exploration of optimized control strategies to improve the system stability margin. Based on the SISO model, a virtual admittance for compensating the negative resistive effect of the PLL is designed to illustrate the advantages of the proposed method in providing design‐oriented analysis. Experimental results verify the effectiveness of the proposed control strategy.