Analyses and Experiments of Ultralow Specific On-Resistance LDMOS With Integrated Diodes

An ultralow specific on-resistance ( ${R} _{\mathrm{ on,sp}}$ ) accumulation-mode LDMOS (ALDMOS) is proposed and investigated by simulations and experiments. The proposed ALDMOS features two separated integrated diodes (SID) above the N-drift surface, which forms high density electron accumulation layer in the on-state. Meanwhile, the SID not only assists depleting the N-drift to increase the N-drift doping centration ( ${N} _{\mathrm{ d}}$ ) in the off-state, but also modulates the lateral electric field to improve the breakdown voltage (BV). Thus, the proposed SID ALDMOS could achieve ultralow ${R} _{\mathrm{ on,sp}}$ and maintain high BV simultaneously. The layout and key fabrication processes of the SID ALDMOS are demonstrated. The measured results show that the SID ALDMOS realizes a BV of 483V and ${R} _{\mathrm{ on,sp}}$ of 29.3m $\boldsymbol{\Omega } $ .cm2, with a high FOM value of 7.96MW/cm2. Its ${R} _{\mathrm{ on,sp}}$ is decreased by 33.7% compared with triple RESURF LDMOS at the same BV.