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Transient radiation response of SOI transistors and SOI devices

Authors :
DU Chuanhua
DUAN Binghuang
XIONG Cen
ZENG Chao
Source :
He jishu, Vol 47, Iss 4, Pp 040402-040402 (2024)
Publication Year :
2024
Publisher :
Science Press, 2024.

Abstract

BackgroundLaser simulation technology is widely used in the research of transient ionizing radiation effects in semiconductor devices. Fully dielectrically isolated silicon-on-insulator (SOI) devices exhibit different responses to dose-rate gamma irradiation compared to bulk-Si devices.PurposeThis study aims to examine the photocurrents of both Si-based and SOI NMOS transistors, and investigate the performance of a SOI MCU with varying dose rates.MethodAn irradiation experiment was conducted on three types of transistors by using a 1 064 nm/12 ns laser device, and the photocurrent was tested under various laser energies. A pulsed γ-ray source was employed to perform the transient γ dose rate radiation test on an SOI-integrated circuit. The function, electrical parameters, and flipflop chain status of the SOI-integrated circuit under different dose rates were measured. Based on theoretical model for the generation of photocurrent in SOI transistor, the dose-rate threshold for logic flipping and corresponding critical charge were estimated based on theoretical model for the generation of photocurrent in SOI transistor.ResultsThe results indicate that the peak photocurrent of the SOI transistor is approximately 20 times lower than that of the bulk silicon transistor with the same feature size under identical irradiation conditions. This reduction is attributed to the decreased charge collection sensitive area of the SOI transistor. Within a dose rate range from 1.0×109 rad(Si)·s-1 to 4.2×1011 rad(Si)·s-1, the SOI-integrated circuit exhibites no latch-up effect. However, irradiation-induced upsets are observed in the SOI-integrated circuit.ConclusionsThese upsets caused by transient radiation effects manifest as transient functional interruptions, variations in operating current and voltage, and erroneous flip-flop statuses. These irradiation-induced upsets in the SOI-integrated circuit are likely attributable to, among other factors, transistor upsets and circuit-level voltage fluctuations on printed circuit board.

Details

Language :
Chinese
ISSN :
02533219
Volume :
47
Issue :
4
Database :
Directory of Open Access Journals
Journal :
He jishu
Publication Type :
Academic Journal
Accession number :
edsdoj.48ccc30428c4b21a19070b727f4cbc1
Document Type :
article
Full Text :
https://doi.org/10.11889/j.0253-3219.2024.hjs.47.040402&lang=zh