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Disturbance Characteristics of 1T DRAM Arrays Consisting of Feedback Field-Effect Transistors

Authors :
Juhee Jeon
Kyoungah Cho
Sangsig Kim
Source :
Micromachines, Vol 14, Iss 6, p 1138 (2023)
Publication Year :
2023
Publisher :
MDPI AG, 2023.

Abstract

Challenges in scaling dynamic random-access memory (DRAM) have become a crucial problem for implementing high-density and high-performance memory devices. Feedback field-effect transistors (FBFETs) have great potential to overcome the scaling challenges because of their one-transistor (1T) memory behaviors with a capacitorless structure. Although FBFETs have been studied as 1T memory devices, the reliability in an array must be evaluated. Cell reliability is closely related to device malfunction. Hence, in this study, we propose a 1T DRAM consisting of an FBFET with a p+–n–p–n+ silicon nanowire and investigate the memory operation and disturbance in a 3 × 3 array structure through mixed-mode simulations. The 1T DRAM exhibits a write speed of 2.5 ns, a sense margin of 90 μA/μm, and a retention time of approximately 1 s. Moreover, the energy consumption is 5.0 × 10−15 J/bit for the write ‘1’ operation and 0 J/bit for the hold operation. Furthermore, the 1T DRAM shows nondestructive read characteristics, reliable 3 × 3 array operation without any write disturbance, and feasibility in a massive array with an access time of a few nanoseconds.

Details

Language :
English
ISSN :
2072666X
Volume :
14
Issue :
6
Database :
Directory of Open Access Journals
Journal :
Micromachines
Publication Type :
Academic Journal
Accession number :
edsdoj.6fbd9d96d146ba99d2022bb4d8b7ad
Document Type :
article
Full Text :
https://doi.org/10.3390/mi14061138