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A Hardware-Aware Heuristic for the Qubit Mapping Problem in the NISQ Era

Authors :
Siyuan Niu
Adrien Suau
Gabriel Staffelbach
Aida Todri-Sanial
Source :
IEEE Transactions on Quantum Engineering, Vol 1, Pp 1-14 (2020)
Publication Year :
2020
Publisher :
IEEE, 2020.

Abstract

Due to several physical limitations in the realization of quantum hardware, today's quantum computers are qualified as noisy intermediate-scale quantum (NISQ) hardware. NISQ hardware is characterized by a small number of qubits (50 to a few hundred) and noisy operations. Moreover, current realizations of superconducting quantum chips do not have the ideal all-to-all connectivity between qubits but rather at most a nearest-neighbor connectivity. All these hardware restrictions add supplementary low-level requirements. They need to be addressed before submitting the quantum circuit to an actual chip. Satisfying these requirements is a tedious task for the programmer. Instead, the task of adapting the quantum circuit to a given hardware is left to the compiler. In this article, we propose a hardware-aware (HA) mapping transition algorithm that takes the calibration data into account with the aim to improve the overall fidelity of the circuit. Evaluation results on IBM quantum hardware show that our HA approach can outperform the state of the art, both in terms of the number of additional gates and circuit fidelity.

Details

Language :
English
ISSN :
26891808
Volume :
1
Database :
Directory of Open Access Journals
Journal :
IEEE Transactions on Quantum Engineering
Publication Type :
Academic Journal
Accession number :
edsdoj.7a0c59d35bee44f199eef25ef19c141d
Document Type :
article
Full Text :
https://doi.org/10.1109/TQE.2020.3026544