Area and power consumption optimization based on dynamic frequency

Area and power consumption of an integrated circuit chip is strongly related to its operating frequency. Using the switching principle of the gate-level circuit under different frequencies and keeping the original design, a system level chip area and power consumption optimization method based on dynamic frequency adjustment is proposed in this paper. Firstly, the relationships of area vs. frequency and power consumption vs. frequency are established by choosing the multiple test sets which satisfy the restricting constraints. Secondly, the mathematical models of area vs. frequency and power consumption vs. frequency are derived. Then, the optimal operating frequency is obtained by resolving the models. With a tape out design, the proposed method achieved about 0.59% area shrink and about 9.01% reduction in power consumption.