Optimized space vector switching sequences for multilevel inverters

Previous work has shown that space vector modulation and carrier modulation for two-level inverters achieve the same phase leg switching sequences when appropriate zero sequence offsets are added to the reference waveforms for carrier modulation. This paper presents a similar equivalence between the phase disposition (PD) carrier and space vector modulation strategies applied to diode clamped, cascaded N-level or hybrid multilevel inverters. By analysis of the time integral trajectory of the converter voltage, the paper shows that the optimal harmonic profile for a space vector modulator occurs when the two middle space vectors are centered in each switching cycle. The required zero sequence offset to achieve this centring for an equivalent carrier based modulator is then determined. The results can be applied to any multilevel converter topology without differentiation. Discontinuous behavior is also examined, with the space vector and carrier based modulation methods shown to similarly produce identical performance. Both simulation and experimental results are presented. Index Terms--Multilevel inverter, pulse width modulation, space vector modulation, zero sequence offset.