An efficient routing tree construction algorithm with buffer insertion, wire sizing, and obstacle considerations

Subjects

Subjects :

Algorithm
Circuit designer
Integrated circuit design
Buffering (Computers) -- Analysis
Algorithms -- Analysis
Circuit design -- Analysis

Details

Language :

English

ISSN :

02780070

Volume :

24

Issue :

4

Database :

Gale General OneFile

Journal :

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Publication Type :

Academic Journal

Accession number :

edsgcl.137062226