A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

Studies on a bidirectional current reduction model that directly simulates circuit-degradation due to hot carriers reveals that the model yields results that agree well with experimental data for NMOSFET parameter such as stressing time. The model simulates hot-electron damage as a bidirectional voltage controlled current supplier. The model does not require SPICE simulation stress constrains and is compatible to all SPICE device models.