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VLSI block placement with alignment constraints
- Source :
- IEEE Transactions on Circuits and Systems-II-Express Briefs. August, 2006, Vol. 53 Issue 8, p622, 5 p.
- Publication Year :
- 2006
-
Abstract
- Corner block list (CBL) is a room-based floorplan representation. In this brief, we give a sufficient and necessary condition for the feasibility of a CBL, and we also deal with aligmnent constraints in CBL. A method is proposed to identify topological relation between two blocks in CBL. Based on the topological relations between blocks, it is also found that a sufficient and necessary condition to judge whether or not a CBL is feasible under alignment constraints. The experimental results showed the efficiency and effectiveness of the proposed method. Index Terms--Alignment, corner block list (CBL), floor-planning, placement.
Details
- Language :
- English
- ISSN :
- 15497747
- Volume :
- 53
- Issue :
- 8
- Database :
- Gale General OneFile
- Journal :
- IEEE Transactions on Circuits and Systems-II-Express Briefs
- Publication Type :
- Academic Journal
- Accession number :
- edsgcl.151274909