Processor mapping techniques toward efficient data redistribution

An architecture-independent processor mapping method to minimize the amount of data transferred between processor memories for 'Block' to 'Cyclic(c)' or vice-versa redistributions of arbitrary number dimensions is introduced. The procedure, which maps logical processors to data elements, provides a 40% improvement to the data redistribution time for data set sizes over other traditional techniques. This was revealed when it was run on an IBM SP processor at Argonne National Laboratory.