Design trade-offs for the last stage of an unregulated, long-channel CMOS off-chip driver with simultaneous switching noise and switching time considerations

Design trade-off relations relate the normalized simultaneous switching noise and normalized switching time to driver size, load capacitance, and ground/power path inductance. The relations are applicable for the last stage of a complementary metal-oxide-semiconductor off-chip driver. The trade-offs also relate the switching patterns to the number of switching drivers and input signal rise time. A dimensionless analysis method allows the extension of the design to many systems that can be simulated using SPICE.