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A design of high-performance pipelined architecture for H.264/AVC CAVLC decoder and low-power implementation

Authors :
Byung-Yup Lee
Kwang-Ki Ryoo
Source :
IEEE Transactions on Consumer Electronics. Nov, 2010, Vol. 56 Issue 4, p2781, 9 p.
Publication Year :
2010

Details

Language :
English
ISSN :
00983063
Volume :
56
Issue :
4
Database :
Gale General OneFile
Journal :
IEEE Transactions on Consumer Electronics
Publication Type :
Periodical
Accession number :
edsgcl.249828750