'Metallic Regime of Silicon Inversion Layers, Energy Levels, and Transport Properties.'

In n-channel silicon inversion layer the small resistance changes with temperature below 4K have been observed and the physical mechanisms quantified. These mechanisms are a temperature dependent elastic scattering which is mostly mitigated by impurities, and the many body effect upon the elastic scattering. In high quality silicon MOSFETs, inelastic diffusion lengths of about 2 micrometers have been observed, which demonstrated quasione dimensional transport processes in submicron devices. Keywords: silicon inversion layers; elastic scattering; inelastic scattering; submicron devices; Metal oxide semiconductors; Field effect transistors.