Implementing the Matrix Exponential Function on Embedded Processors

In this paper we describe and benchmark an implementation of the matrix exponential function. The implementation is based on the standard technique of scaling and squaring from the literature. The major kernels in this technique are matrix multiplication and Gaussian elimination. In the matrix multiply kernel, the implementation makes use of SIMD vector extensions present on the PowerPC G4 (Altivec) and the Intel Xeon (SSE-2). Although the use of the matrix exponential expands the operation count of the extended Kalman filter substantially, benchmarks of the implementation show that the workload is well within the capabilities of modern processors.
See also ADM001742, Proceedings of the Annual High Performance Embedded Computing (HPEC) Workshop (8th), Vol 1, held in Lexington, MA on 28-30 Sep 2004. Sponsored in part by the Department of the Navy. The original document contains color images.