SAR Image Processing Based on the LEON3 Multiprocessor for CP-SAR onboard Microsatellite

The SAR imaging processor is an essential part in SAR system to produce the final SAR image quality that used for various remote sensing applications. In this paper, we propose the design and describe the development of onboard SAR image processor based on LEON3 softcore multiprocessor implemented on FPGA board. The proposed SAR image processor is targetted to used for future onboard Unmanned Aerial Vehicle (UAV) and microsatellite of Josaphat Microwave Remote Sensing Laboratory (JMRSL). The system-on-chip (SoC) approach has been used for highly configurable, easy to integrate with other IP core through an AMBA on-chip bus and low-cost implementation. The open hardware LEON3 multiprocessor has been configured to meet the system requirement to aim at high-performance processing. The implementation of the proposed SAR image processing is targetted on an Altera Cyclone IV FPGA family and Xilinx Artix-7 FPGA AC701 Evaluation Kit. The RDA algorithm is implemented as software to run on the LEON3 Multiprocessor, and the functionality validated using the ALOS PALSAR raw data. The preliminary results show that the functionality of the system successfully works and can compress the SAR raw data into an SAR image, whereas the processing speed needs to be improved. The proposed design promises to answer the problem of SAR image processing in the future with a low price.