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FastIC: a fast integrated circuit for the readout of high performance detectors

Authors :
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
Gómez Fernández, Sergio
Alozy, J.
Campbell, Michael
Manera Escalero, Rafael
Mauricio Ferré, Juan
Sanmukh, Anand
Sanuy Charles, Andreu
Ballabriga, Rafael
Gascón Fora, David
Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
Gómez Fernández, Sergio
Alozy, J.
Campbell, Michael
Manera Escalero, Rafael
Mauricio Ferré, Juan
Sanmukh, Anand
Sanuy Charles, Andreu
Ballabriga, Rafael
Gascón Fora, David
Publication Year :
2022

Abstract

This work presents the 8-channel FastIC ASIC developed in CMOS 65¿nm technology suitable for the readout of positive and negative polarity sensors in high energy physics experiments, Cherenkov detectors and time-of-flight systems. The front-end can be configured to perform analog summation of up to 4 single-ended channels before discrimination in view of improving time resolution when segmenting a SiPM. The outputs encode the time-of-arrival information and linear energy measurement which captures the peak amplitude of the input signal in the 5 µA–25 mA input peak current range. Power consumption of the ASIC is 12 mW/ch with default settings. Measurements of single photon time resolution with a red-light laser source and a HPK SiPM S13360-3050CS are ˜140¿ps FWHM.<br />Postprint (author's final draft)

Details

Database :
OAIster
Notes :
7 p., application/pdf, English
Publication Type :
Electronic Resource
Accession number :
edsoai.on1348513666
Document Type :
Electronic Resource