HyCSim: A rapid design space exploration tool for emerging hybrid last-level caches

Recent years have seen a rising trend in the exploration of non-volatile memory (NVM) technologies in the memory subsystem. Particularly in the cache hierarchy, hybrid last-level cache (LLC) solutions are proposed to meet the wide-ranging performance and energy requirements of modern days applications. These emerging hybrid solutions need simulation and detailed exploration to fully understand their capabilities before exploiting them. Existing simulation tools are either too slow or incapable of prototyping such systems and optimizing for NVM devices. To this end, we propose HyCSim, a trace-driven simulation infrastructure that enables rapid comparison of various hybrid LLC configurations for different optimization objectives. Notably, HyCSim makes it possible to quickly estimate the impact of various hybrid LLC insertion and replacement policies, disabling of a cache region at byte or cache frame granularity for different fault maps. In addition, HyCSim allows to evaluate the impact of various compression schemes on the overall performance (hit and miss rate) and the number of writes to the LLC. Our evaluation on ten multi-program workloads from the SPEC 2006 benchmarks suite shows that HyCSim accelerates the simulation time by 24×, compared to the cycle-accurate Gem5 simulator, with high-fidelity.
This work was partially funded by the HiPEAC collaboration grant 2020, the German Research Council (DFG) through the TraceSymm project (366764507) and the Co4RTM project (450944241), MCIN/AEI/10.13039/501100011033 (grants PID2019-105660RB-C21 and PID2019- 107255GB-C22), and by Aragón Government (T5820R research group).
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Postprint (published version)