Isolation QoS Setups to Control Memory Contention on MPSoCs

In critical systems such as avionics and automotive domains, ensuring timely task execution is crucial to prevent catastrophic situations. The increasing trend towards autonomous operation demands higher performance and efficiency, leading to the adoption of Multiprocessor System-on-Chips (MPSoCs). However, the challenge arises in meeting timing requirements due to contention in accessing shared resources and the complexity of these resources. This work introduces Quasi-Isolation QoS Setups (QIQoS), a novel approach for efficiently managing Quality of Service (QoS) mechanisms in MPSoCs. QIQoS aims to make the behavior of MPSoCs more predictable, precise, and adaptable to the specific timing constraints of critical applications. By selecting different QoS solutions, QIQoS mitigates timing interference, minimizes execution time variability, and ensures a high degree of isolation for applications, regardless of contention from co-running applications. The evaluation of QIQoS on a Xilinx Zynq UltraScale+ MPSoC demonstrates its effectiveness in achieving high isolation and minimal variability between critical tasks. This success is attributed to the management of DDR memory controller QoS mechanisms and the mitigation of memory contention among computing elements. Overall, QIQoS proves to be a valuable solution for enhancing predictability in MPSoC-based systems in real deployment scenarios.