ATM QoS support via output port controllers

The challenge in building an ATM switch, especially in the area of QoS control, lies in the design of the port controllers. By combining port reconfiguration, cell scheduling and connection admission control, a programmable QoS controller at the output port of the non-blocking, output-buffered reconfigurable ATM switch is proposed. In such a switch, the output port is the only point of contention that can cause possible QoS degradations due to excessive queueing delays. Cell scheduling is used as an essential mechanism for attaining meaningful differentiated QoS behaviours. The QoS controller combines per-connection buffer management with a table-driven cell scheduler to achieve a broad range of QoS behaviours. This paper reports the simulation results of our study on (i) the effects of different traffic characteristics, and (ii) the effects of slot algorithms in the cell scheduler, on the QoS performance.