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This paper proposes a new dynamic behavior model for single-electron transistors (SETs). A comprehensive review of modeling techniques and previous models was carried out aiming to remark the originality of the new proposed technique. Once established that SET is a nonlinear system, five classes of nonlinear models were simulated and compared to each other. Characteristic SET curves obtained using Simulation of Nanostructures were used as benchmark. The mean squared error (mse) was used as metric, and the simulation time was computed for each model. Regarding these two criteria—least mse and least simulation time—the Hammerstein–Wiener model outperformed the others models. [ABSTRACT FROM AUTHOR]

In this paper, a new continuous multilevel compact model for phase-change memory (PCM) is proposed. It is based on the modified rate equations with the introduction of a variable related to material melting. The model is evaluated using a large set of dynamic measurements and shows a good accuracy with a single model card. All fitting parameters are discussed, and their impacts are detailed. Full circuit simulation is performed. Good convergence and fast simulation time suggest that this new compact model can be exploited for PCM circuit design. [ABSTRACT FROM AUTHOR]

Process variations increasingly challenge the manufacturability of advanced devices and the yield of integrated circuits. Technology computer-aided design (TCAD) has the potential to make key contributions to minimize this problem, by assessing the impact of certain variations on the device, circuit, and system. In this way, TCAD can provide the information necessary to decide on investments in the processing level or the adoption of a more variation tolerant process flow, device architecture, or design on circuit or chip level. In this first of two consecutive papers, sources of process variations and the state of the art of related simulation tools are reviewed. An approach for hierarchical simulation of process variations including their correlations is presented. The second paper, also published in this issue, presents examples of simulation results obtained with this methodology. [ABSTRACT FROM AUTHOR]

A compact model for the single-poly multitime programmable (MTP) memory cells is presented in this paper for the first time. It is based on the charge balance approach, while the traditional old model is on the fixed capacitive coupling approach. The proposed cell model has been implemented by Verilog-A and integrated into commercial SPICE simulator. The model supports both dc and transient analyses, and the simulated results are consistent very well with those from device simulation and measurement, whereas the results by the traditional old model deviate substantially. Furthermore, the comprehensive optimization of the MTP cells is made feasible thanks to the new model, such as device size, high voltage ramp rate, and reliability prediction. As a result, this compact cell model will be very useful for the designers to evaluate and optimize a single-poly MTP cell. [ABSTRACT FROM AUTHOR]

To simulate semiconductor devices and circuits working at high frequencies or under a large signal input and to better understand their physical effects, a physically based simulation method is proposed in this paper. It utilizes a physical-model-based field simulation to analyze the semiconductor devices in a circuit and incorporates the field simulation into an equivalent-model-based circuit simulation to simulate the circuit. For the field simulation, a genetic-algorithm-based curve-fitting approach is proposed to extract the parameters of the semiconductor devices’ physical models. The proposed method is employed for the analysis of a few circuits containing a commercial p-i-n diode with model number mot_bal99lt1. The feasibility and accuracy of the proposed method are validated through a comparison of its simulation results with the measurement data, and good agreement is observed. The other merits of the proposed method are also illustrated, including its ability to provide useful physical mechanisms for the better understanding of the behavior of the p-i-n diode under various working conditions. [ABSTRACT FROM PUBLISHER]