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Objective: Our objective was to perform a systematic review and meta‐analysis comparing the clinical outcomes after endoscopic and microscopic type I tympanoplasty. Study Design: Randomized controlled trials, two‐arm prospective studies, and retrospective studies were included. Setting: Medline, Cochrane, EMBASE, and Google Scholar databases were searched until March 1, 2022 using the combinations of search terms: "endoscopic," "microscopic," and "tympanoplasty." Methods: Two independent reviewers utilized the abovementioned search strategy to identify eligible studies. If any uncertainty existed regarding eligibility, a third reviewer was consulted. Primary outcome measures were graft success rate, air‐bone gap (ABG) improvement, and operative time. Secondary outcomes were the rate of need for canalplasty, the proportion of self‐rated excellent cosmetic results, and pain visual analog scale (VAS). Results: Forty‐three studies enrolled a total of 3712 patients who were undergoing type I tympanoplasty and were finally included. The pooled result showed endoscopic approach was significantly associated with shorter operative time (difference in means: −20.021, 95% confidence interval [CI]: −31.431 to −8.611), less need for canalplasty (odds ratio [OR]: 0.065, 95% CI: 0.026‐0.164), more self‐rated excellent cosmetic results (OR: 87.323, 95% CI: 26.750‐285.063), and lower pain VAS (difference in means: −2.513, 95% CI: −4.737 to −0.228). No significant differences in graft success rate or ABG were observed between the two procedures. Conclusion: Endoscopic type I tympanoplasty provides a similar graft success rate, improvement in ABG, and reperforation rate to microscopic tympanoplasty with a shorter operative time, better self‐rated cosmetic results, and less pain. Unless contraindicated, the endoscopic approach should be the procedure of choice in type I tympanoplasty. [ABSTRACT FROM AUTHOR]

In this letter, the word line (WL) interference behavior in 3D NAND cell and the impact on program sequence of 3D NAND array operation are discussed. The WL interference induced by source-side neighboring cell is always smaller than that induced by drain-side neighboring cell. Due to this asymmetric characteristic, program sequence from top to bottom will have the advantage of suffering less operation window loss resulting from WL interference, over the traditional program sequence from bottom to top. This advantage can be clearly validated by the experimental results. However, at some specific WL’s of the array, the trend is reversed. The root cause of the reverse trend is then clarified to result from the unexpected undercut of sacrificial nitride film occurring during the imperfect vertical channel etching process for 3D NAND array formation. [ABSTRACT FROM AUTHOR]

Advanced Chemical-mechanical polishing (CMP) process not only needs to maintain stable run-to-run thickness control but also achieve better within wafer/within chip planarization performance. Furthermore, slurries or other consumable parts, like PAD and Disks selection are also the keys for CMP process optimization. The most difficult thing in CMP process is to have capability to predict and cover the various topologies and layout densities patterned wafers and preventing the hot spots occurrences. In this study, different Neural-Network algorithm with data pre-processing models are implemented to the in-line CMP CLC tuning and dishing/erosion prediction at various topology/pattern density test vehicle pattern wafers. Transfer learning technique is implemented on the original Neural -Network algorithm model, the behavior of real product can be simulated and predicted based on the knowledge of test vehicle database successfully. With the aid of multiple layer erosion/ dishing Neural-Network algorithm model prediction, the potential high risky hot spots can be highlighted at the initial layout design stage, then further shorten the turn-around time of design layout validation. [ABSTRACT FROM AUTHOR]

Defect classifications are the very important steps as the in-line defect inspection of the semiconductor manufacturing procedure. The conventional defect classifications are usually through visual judgement by engineer or technical assistant. However, it’s time-consuming and laborious. In our recent study, the artificial intelligence automatic defect classification (AI-ADC) performed promisingly good accuracy and purity (A/P) of the auto defect classification by deep learning method. Nevertheless, some kinds of tiny defects are not only suffered lower A/P issues, but also suffered bad A/P stability of real defect classification. In this work, we propose the novel method, called “Hierarchical structure AI-ADC”, which introduced a second binning classifier and it’s based on hierarchical clustering to achieve more precise defect classification. As a result, the proposed method shown obvious improvements to the binning purity of multi-lines bridge defect from 56% to 88% as well as the stability variation has been reduced from 55% to 22%, besides it also can be applied to classify the similar defect types efficiently. Indeed this approach achieves excellent defect classification and highly stable performance. [ABSTRACT FROM AUTHOR]

The threshold voltage (Vth) distributions of ground-select-line (GSL) cells and edge dummy (DMY0) cells in a 3-D NAND flash memory are investigated. We characterize the Vth distributions in 3-D NAND flash samples with different fabrication processes and bitline voltages. Large DMY0 and GSL Vth distribution tails are observed in certain fabrication process and operation voltage conditions. The DMY0 Vth tail is attributed to a random distribution of grain boundary (GB) traps in a poly-silicon channel between GSL and DMY0. The GSL Vth tail is affected by ion implant energy in an epitaxial silicon layer underneath a GSL. A 3-D TCAD simulation is performed to study the effects of a GB trap position and a bitline voltage on the Vth distribution of DMY0. The influence of an implant dose profile in the epitaxial silicon on the GSL Vth distribution is also analyzed by 3-D simulation. The GSL and the DMY0 Vth distributions can be significantly improved by optimizing a fabrication process and choosing an appropriate bitline voltage. [ABSTRACT FROM AUTHOR]

We investigate electron and hole lateral migration in Vt retention loss in a multilevel charge trap flash memory. We use hot electron program and band-to-band tunneling hot hole erase to inject various amounts of electrons and holes at the two ends of a SONOS cell. A random telegraph signal (RTS) method is used to distinguish electron and hole lateral movements in silicon nitride. In Vt retention measurement, we apply a voltage to the gate or the source/drain to enhance or retard trapped charge vertical loss and lateral migration. From the evolution characteristics of RTS and Vt traces in retention, we are able to identify the separate roles of electron vertical loss, electron lateral migration, and hole lateral migration in different data patterns. Due to the interaction of stored electrons and holes, we find that Vt retention loss in a program state exhibits a turnaround characteristic as program Vt level increases. Vt loss at low program levels is attributed to hole lateral migration from a neighboring bit. At higher program levels, the influence of hole lateral migration is reduced and Vt loss is dominated by electron vertical loss and lateral migration. [ABSTRACT FROM AUTHOR]

Transient cell current caused by the trapping/detrapping of grain boundary traps in the polycrystalline silicon (poly-Si) channel of a 3-D NAND cell string is comprehensively studied in this paper. This transient has a time constant of $10~\mu \text{s}$ or longer and is strongly dependent on the bias history. It is also affected by the trap distribution as revealed by TCAD simulations. Sensing offset between program verify and read results in “pseudo” charge loss/gain that reduces the sensing margin. The posttreatment of the poly-Si channel is suggested to mitigate this effect. [ABSTRACT FROM AUTHOR]

We investigated electric field-induced trapped electron lateral migration in a SONOS flash cell. The threshold voltage shift ( \Delta \textVt ) and gate-induced drain leakage (GIDL) current were measured to monitor nitride electron movement in retention. We applied different voltages to the gate and the source/drain in retention to vary the vertical and lateral electric fields. Our study shows that: 1) GIDL current can be used to monitor trapped charge lateral migration and 2) nitride charge lateral migration exhibits strong dependence on the lateral electric field. Based on measured temperature and field dependence, a nitride trapped charge emission process via thermally assisted tunneling is proposed for electron lateral migration. The emission rates of thermally assisted tunneling, direct trap-to-band tunneling and Frenkel–Poole emission were compared. [ABSTRACT FROM PUBLISHER]

Objectives/Hypothesis Pediatric obstructive sleep apnea syndrome ( OSAS) is a common disorder with serious clinical implications if left untreated. The recommended initial treatment for pediatric patients with obstructive sleep apnea syndrome ( OSAS) is adenotonsillectomy. However, recent reports have shown variable surgical results with adenotonsillectomy in the treatment of pediatric OSAS. Study Design Prospective, controlled study. Methods From April 2007 to August 2010, 24 participants were assigned alternatively to either adenotonsillectomy with pillar suturing (intervention group) or adenotonsillectomy alone (control group). Result The average improvement in apnea hypopnea index ( AHI) was 42.6% in the control group and 79.9% in the intervention group ( P=0.037). The success rate was 50% in the control group and 91.6% in the intervention group ( P=0.034). Six patients (50%) in the intervention group achieved complete resolution of pediatric OSAS, as defined by an AHI <1/hour, compared to 2 patients (16.7%) in the control group ( P=0.097). Conclusion Adenotonsillectomy with pillar suturing showed significant improvement in treating pediatric patients with OSAS compared to adenotonsillectomy alone. The procedure is simple and safe. Level of Evidence 4. Laryngoscope, 123:2574-2578, 2013 [ABSTRACT FROM AUTHOR]

A Vt retention distribution tail in a multitime-program (MTP) silicon–oxide–nitride–oxide–silicon (SONOS) memory is investigated. We characterize a single-program-charge-loss-induced \Delta Vt in nor-type SONOS multilevel cells (MLCs). Our measurement shows the following: 1) A single-charge-loss-induced \Delta Vt exhibits an exponential distribution in magnitudes, which is attributed to a random-program-charge-induced current-path percolation effect, and 2) the standard deviation of the exponential distribution depends on the program-charge density and increases with a program Vt level in an MLC SONOS. In addition, we measure a Vt retention distribution in a 512-Mb MTP SONOS memory and observe a significant Vt retention tail. A numerical Vt retention distribution model including the percolation effect and a Poisson-distribution-based multiple-charge-loss model is developed. Our model agrees with the measured Vt retention distribution in a 512-Mb SONOS well. The observed Vt tail is realized mainly due to the percolation effect. [ABSTRACT FROM PUBLISHER]

A novel low-voltage low-power programming method for nand Flash cell is presented. By utilizing the self-channel boosting technique, a sufficiently high local field is established in a nand string that causes efficient hot-carrier injection. This method has been successfully demonstrated in the 75-nm-node floating-gate nand cells, along with comprehensive studies on bias and timing effects. Requirements for high-voltage supporting devices, circuitry, and process in conventional Fowler–Nordheim programmed nand cells are greatly mitigated. It would be very attractive for scaled nand Flash technology in the future. [ABSTRACT FROM AUTHOR]

Geometric effects on program/erase speeds, endurance, and charge retention of polysilicon-oxide-nitride-oxide-silicon-type memories are investigated with various structures, including Flash cells, capacitors, and NAND array strings of different dimensions. NAND strings with common word-lines or/and bit-lines were employed to characterize the Lg and W effect on device performance, which builds up the capability to extrapolate the cell properties of various dimensions. For a charge trapping storage device, it suggests that the evaluation carried out on a large-area device always leads to a conclusion more optimistic than the cell inside array of a real product in all aspects. In addition, a numerical model is proposed to elucidate the observed phenomena from a statistical viewpoint. [ABSTRACT FROM AUTHOR]

A novel array architecture is proposed for floatinggate nor-type nonvolatile memory cells. By embedding a floating \n+ region between two cells in each memory pair, punchthrough (PT) immunity is greatly improved. Since the operating cell and the cascade cell belong to two independent wordlines, bit-pattern effect on read and program characteristics is mitigated, and multilevel-cell storage can be easily realized. No additional program disturb has been found. Erase, endurance, and retention characteristics are comparable with its conventional counterpart. According to simulations, Lg as short as 56 nm, which is projected to serve for 28 nm technology node, is feasible without suffering a serious PT effect. [ABSTRACT FROM AUTHOR]

A novel random telegraph signal (RTS) method is proposed to characterize the lateral distribution of injected charge in program and erase states in a nor-type silicon–oxide–nitride–oxide–silicon Flash memory. The concept of this method is to use RTS to extract an oxide trap position in the channel and then to use the trap and RTS as internal probe to detect a local channel potential change resulting from injected charge during program/erase. By using this method, the lateral width of the injected charge-induced channel potential barrier is shown to be around 20 nm in channel hot electron (CHE) program. Our method also confirms that Channel Initiated Secondary ELectron (CHISEL) program has a broader injected charge distribution than CHE program. A mismatch of CHE program electrons and band-to-band tunneling erase holes is observed. Program-state Vt retention loss models, charge vertical loss versus lateral migration, are reexamined by using this method. The polarity of a program-state charge distribution along the channel is explored within 10–20 program/erase cycles. Nitride charge vertical loss is verified by this method. [ABSTRACT FROM PUBLISHER]

Objective: To analyze the characteristics of 150 women who visited a premenstrual syndrome (PMS) clinic in a Taiwanese medical center staffed by both psychiatrists and gynecologists. Method: All subjects were interviewed and assessed for premenstrual dysphoric disorder (PMDD) using DSM-IV criteria, a PMS questionnaire, and the structured Mini-International Neuropsychiatric Interview (MINI). Where PMDD was suspected, subjects were followed using a daily symptom record. Results: A total of 110 subjects (73%) met the ICD-10 criteria for PMS. The most common PMS symptoms were minor psychological discomfort, muscular tension, and aches or pains. For 129 subjects (86%), other concurrent psychiatric disorders were diagnosed using the MINI. Of these, 48 (37%) reported premenstrual exacerbation (PME) of a previously diagnosed psychiatric condition. Conclusion: The results of this study indicate that women who complain of PMS may be at a high risk of other psychiatric dysfunction, especially mood disorder. Further, the high proportion of PME cases determined in this study suggests that further investigation is required. [ABSTRACT FROM AUTHOR]

Abstract A special mental health clinic was set up in the gynecologic out-patient setting of a medical center. The present study examined the demographic and clinical characteristics of patients seen at the clinic and evaluated the need for mental health services in a gynecologic setting. Participants were 136 consecutive patients who visited the clinic during a 6 month period. Their ages ranged from 20 to 74 years, with a mean age of 41.5 ± 12.3 years. Twenty-three percent of women were referred by gynecologists. All subjects were interviewed by experienced psychiatrists using the structured Mini-International Neuropsychiatric Interview (MINI), supplemented by the DSM-IV criteria for premenstrual dysphoric disorder (PMDD) and other diagnoses. The most common diagnosis was major depressive disorder (36.0%), followed by generalized anxiety disorder (29.4%), PMDD (16.2%), dysthymic disorder (14.7%) and others. Patients were categorized into four major diagnostic categories: depressive disorders, anxiety disorders, PMDD and others. No significant differences were found in years of education, employment status, living situations or referral pattern among the four major diagnostic groups. Most patients with anxiety disorders were married. Our results suggest that the gynecologic department may be a good setting to help women with mental disorders. [ABSTRACT FROM AUTHOR]

Background: As the design layout of integrated circuits (ICs) is continually scaling down, sub-resolution assist features (SRAF) have been extensively used in resolution enhancement technique applications to enhance lithography printing fidelity and widen the manufacturing process window (PW). With conventional SRAF insertion techniques, rule-based SRAF (RB-SRAF) and model-based SRAF (MB-SRAF) methods have since been widely adopted. Aim: The typical RB-SRAF is an efficient method to generate SRAFs consistently for simple designs but cannot be optimized for multiple critical patterns or complex layout schemes. Although MB-SRAF is able to achieve better PW as well as reducing conflicts between placement rules and clean-up rules, many iterations for convergence and extremely high computational costs are required. The explosion of machine learning techniques could facilitate the complex processes of mask optimization, such as SRAF insertion. Approach: Generative adversarial network was studied on a Via layer of advanced 3D NAND flash memory, by training target images and Inverse Lithography Technology (ILT) images of target patterns. GAN models, pix2pix, and CycleGAN, were first trained and then utilized to synthesize realistic ILT images. Results: These ILT images were eventually translated to polygons of SRAF with simplification process and mask manufacturing rules check constraints. The simulation results demonstrate that CycleGAN approach can place SRAF with comparable performance to mask optimization (MO) result which was optimized by the Tachyon source-mask optimizer (SMO). Conclusions: Methodologies of SRAF placement based on GANs were demonstrated in this paper. While traditional MO approach showed the best lithography performance, CycleGAN in particular was close behind and had much better performance than conventional RB-SRAF approach, whilst achieving good stability for different layout environments. Most importantly, the efficiency of SRAF insertion can be enhanced significantly through GANs. [ABSTRACT FROM AUTHOR]