20 results on '"Hosseinabady, Mohammad"'
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2. Sparse Matrix-Dense Matrix Multiplication on Heterogeneous CPU+FPGA Embedded System.
3. A Streaming Dataflow Engine for Sparse Matrix-Vector Multiplication Using High-Level Synthesis.
4. Simultaneous multiprocessing in a software-defined heterogeneous FPGA.
5. Optimised OpenCL workgroup synthesis for hybrid ARM-FPGA devices.
6. Energy optimization of FPGA-based stream-oriented computing with power gating.
7. Energy Optimization in Commercial FPGAs with Voltage, Frequency and Logic Scaling.
8. Run-time power gating in hybrid ARM-FPGA devices.
9. Fault-Tolerant Reconfigurable On-Chip-Network.
10. Exploring dynamically reconfigurable multicore designs with NoRC designer.
11. Single-Event Transient Analysis in High Speed Circuits.
12. de Bruijn graph as a low latency scalable architecture for energy efficient massive NoCs.
13. de Bruijn graph as a low latency scalable architecture for energy efficient massive NoCs.
14. Using the inter- and intra-switch regularity in NoC switch testing.
15. Using the inter- and intra-switch regularity in NoC switch testing.
16. Simultaneous Reduction of Dynamic and Static Power in Scan Structures.
17. TED+.
18. Low Latency and Energy Efficient Scalable Architecture for Massive NoCs Using Generalized de Bruijn Graph.
19. A Selective Trigger Scan Architecture for VLSI Testing.
20. Correction to: Simultaneous multiprocessing in a software-defined heterogeneous FPGA.
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